Flip-flops: SR, JK, D, T, and applications MCQs January 8, 2026November 19, 2024 by u930973931_answers 20 min Score: 0 Attempted: 0/20 Subscribe 1. In an SR flip-flop, what happens when both Set (S) and Reset (R) inputs are high? (A) The output is undefined (B) The output is reset to 0 (C) The output is set to 1 (D) The output toggles 2. Primary limitation of the SR flip-flop: (A) It has only one input (B) It can only store one bit of data (C) It gives an undefined output when both Set and Reset are high (D) It does not respond to clock pulses 3. JK flip-flop is an improvement over SR flip-flop because: (A) It has one input only (B) It is faster than other flip-flops (C) It operates without a clock pulse (D) It has no undefined state 4. When both J and K inputs of a JK flip-flop are high (1): (A) The output is set to 1 (B) The output is reset to 0 (C) The output toggles (D) The output remains unchanged 5. Primary use of a JK flip-flop: (A) Data storage (B) Counting and frequency division (C) Memory addressing (D) Signal amplification 6. In a D flip-flop, the output Q when the clock signal is applied: (A) Q takes the value of the D input (B) Q holds the previous value (C) Q becomes the inverse of D (D) Q resets to 0 7. D flip-flop is commonly used for: (A) Data storage and synchronization (B) Frequency division (C) Digital arithmetic (D) Shift register applications 8. T flip-flop is mainly used for: (A) Storing binary data (B) Counting and frequency division (C) Adding two numbers (D) Multiplying two numbers 9. What does the “T” in T flip-flop stand for? (A) Time (B) True (C) Transistor (D) Toggle 10. In a T flip-flop, when the T input is high (1), what happens to output Q? (A) The output is set to 1 (B) The output toggles (C) The output is reset to 0 (D) The output holds its previous state 11. Which flip-flop is commonly used in binary counters? (A) SR flip-flop (B) JK flip-flop (C) T flip-flop (D) D flip-flop 12. In a 4-bit binary counter, how many flip-flops are required? (A) 2 (B) 16 (C) 8 (D) 4 13. Flip-flop typically used for data synchronization: (A) SR flip-flop (B) JK flip-flop (C) D flip-flop (D) T flip-flop 14. A frequency divider circuit can be implemented using: (A) T flip-flop (B) SR flip-flop (C) JK flip-flop (D) D flip-flop 15. The “master-slave” configuration is used in which flip-flop to eliminate race conditions? (A) SR flip-flop (B) D flip-flop (C) JK flip-flop (D) T flip-flop 16. A register that stores multiple bits of data is typically composed of: (A) SR flip-flops (B) JK flip-flops (C) T flip-flops (D) D flip-flops 17. In a digital circuit, a flip-flop is used to store: (A) Analog signals (B) Power signals (C) Clock pulses (D) Binary data 18. In a JK flip-flop, when clock is applied and J = 1, K = 0: (A) The output is reset to 0 (B) The output is set to 1 (C) The output toggles (D) The output remains unchanged 19. In a D flip-flop, when clock is applied and D = 0: (A) The output Q becomes 1 (B) The output Q becomes 0 (C) The output Q toggles (D) The output Q remains unchanged 20. Which of the following is NOT a common application of flip-flops? (A) Counters (B) Shift registers (C) Digital timers (D) Amplifiers